We discuss updates in development and study benchmarks of servers on open architecture
If you are interested in the development of open architecture or are developing systems for it, do not miss the free meetup Russian RISC-V Alliance. It brings together independent computer hardware and software developers based on free architecture.
April 15 at 19:00 representatives of the alliance will gather to discuss the latest developments and experience with RISC-V systems. Register to the meetup to connect online and keep abreast of the development of the RISC-V ecosystem in Russia.
What's in the program
News RISC-V International
Sergey Yakushkin
Director of Software Development Department, YADRO
I’ll tell you why we decided to organize a meetup, and share the RISC-V Alliance’s plans for events and work with the community in 2024. Also, together with the participants, we will consider the current standards and products that determine the development of RISC-V technology. Let's find out the latest news from the world of open architecture, see what new products based on it are already available on the market or are expected in the near future.
Linux RISC-V Support Overview: Boot Features and Supported Extensions
Sergey Matyukevich
Lead Software Engineer in System Software Department, YADRO
In the report I will tell you about the features of booting Linux on RISC-V systems. You will learn:
why do you need SBI firmware,
which RISC-V extensions require support in SBI firmware,
how OpenSBI works – open source implementation of SBI firmware.
In addition, I will review the main RISC-V extensions, support for which is already available in recent releases of the Linux kernel or will appear in upcoming releases.
Application of the P-extension of the RISC-V instruction set for digital signal processing algorithms
Dmitry Zakharov
Embedded Software Developer, CloudBEAR
Let's look at how the Packed SIMD extension of RISC-V instructions fits into classic integer DSP algorithms. We will also find out how this affects productivity and what our “colleagues in the shop” have implemented in this direction.
RISC-V Matrix Extensions: Where, When, Where, From, Why, Why and How
Valeria Puzikova
Software Development Expert, YADRO
Matrix operations are eternal hotspots not only in AI/ML and HPC tasks, but also in AR/VR applications, image processing and others. Not long ago, another way to speed them up appeared – matrix CPU extensions. Let's see what they are, how they are structured and what effect they can achieve. And the most interesting thing: when will standard RISC-V matrix extensions appear, how many of them will there be and what is happening right now.
Some observations and conclusions from the analysis of the performance of RISC-V servers available on the market
Dmitry Petrochenko
R&D engineer, Sberbank
Let's consider the characteristics of access to caches of different levels of one of the first dual-processor server systems of the RISC-V architecture using synthetic benchmarks. We will also discuss the cost of intersocket communication.
Where and when do we meet?
April 15, Friday. The meetup starts at 19:00. We will send you a link to the broadcast after registration. Online. Also, all registered participants will receive recorded reports.
