Voltage control by PWM signal (PWM+RC=DAC)

Prologue

This is a text about the fact that microcontroller programmers need to be able to calculate mathematical limits! Who would have thought in the first year that this could even be useful?

In the next test electronic board there was a need to emit analog sensors on wires. As usual, due to Sanctions and Embargoes, you can no longer just buy an ASIC DAC chip with SPI control (type AD5641) + an ADC4700 operational amplifier.

DAC+OAP

DAC+OAP

Therefore, it was decided to make a DAC based on PWM and RC chains.

There is a very ingenious way to build a DAC using a PWM signal and an RC chain. The output will be an analog signal. Moreover, the level of this voltage can be controlled digitally from the firmware by changing the PWM modulation parameters: filling and frequency.

Formulation of the problem

Here's an electrical circuit.

RC-R filter

RC-R filter

Given:

No.

Constant

Designation

units

1

Resistance

R1

Ohms

2

Resistance

R2

Ohms

3

Capacity

C

Farads

4

PWM signal amplitude

A

Volts

5

Desired voltage

Out

Volts

It is required to find such parameters of the PWM signal at which the desired voltage Uout is established at the output of the RC filter. That is, we need to find

No.

Variable

Designation

units

1

PWM frequency

F_pwm

Hertz

2

PWM period

T

seconds

5

duty cycle of PWM pulses

Q=T/tau

3

PWM pulse duration per period

D=100*tau/T

Interest

4

PWM pulse duration

tau

seconds

It turns out that you need, no less, to design a pseudo DAC using just a PWM and RC low-pass filter.

Solution

First, let’s speculate qualitatively, on our fingers. It is clear that if the duration of the PWM pulse tau is equal to the period tay=T, then the PWM degenerates into a constant voltage and the output voltage is maximum. When tau=0, the output voltage is obviously zero. The output voltage definitely depends on the pulse duration.

Looking at the transient process, the RC low pass filter initially acts as an integrator.

However, some questions immediately arise:

1– Here I have a circuit design with R and C. What frequency should I choose for PWM?

2–Does the PWM frequency depend on R and C? (spoiler: The PWM frequency should be much greater than the low-pass filter cutoff frequency)

3–Is the dependence of the output voltage on the pulse duration linear? (spoiler: yes)

4–What generally needs to be changed to regulate the output voltage: frequency or duty cycle of the PWM signal? (spoiler: duty cycle)

What do we even want? Essentially, we want to get a constant voltage from PWM. That's all. What is PWM? This is a constant bias voltage + some high-frequency harmonics.

It turns out that we need to discard all non-zero harmonics from PWM. Like this! And the lowest frequency PWM harmonic is 1/T, where T is the PWM period.

These simple considerations led to the conclusion that the cutoff frequency of the RC filter should be less than the lowest positive PWM frequency (1/T). Or the PWM frequency should be much greater than the low-pass filter cutoff frequency. In this case, the cutoff frequency of the RC filter must be greater than zero. We want to leave the zero harmonic and take it outside. At this stage we have an answer to the second question. Yes, the PWM frequency depends on the circuit design and must be greater than the cutoff frequency of the first order RC filter. But just how many times more?

I don’t want to now derive the frequency response of such an RC-R filter using an analytical 4-level formula. It can be easier to calculate with this Python script. The script is written on the basis that an RC filter is simply a voltage divider with a reactive component whose resistance depends on frequency. That's all. The script is based on Kirchhoff's second law for the electrical circuit shown above

import matplotlib.pyplot as plt
import math
import numpy as np
Uin_v=3.3
R_79 = 39000 #To MCU
R_73 = 39000 #GND
C_26 = 1*(10**(-6))
f_end_hz = 600
f_step_hz = 0.1
f_hz = np.arange(0.00001, f_end_hz, f_step_hz)
omega_rad = 2math.pif_hz
Xc=1.0/(omega_radC_26)
R_gnd=(R_73Xc)/(R_73+Xc)
R_total = R_79+R_gnd
I_f=Uin_v/R_total
Uout_v = I_f*R_gnd
Frequency_response=Uout_v/Uin_v
plt.plot(f_hz, Uout_v, label="Uout")
#plt.plot(f_hz, Frequency_response, label="Uout")
plt.title('RCR filter Frequency response')
plt.xlabel('Freq,[Hz]')
plt.ylabel('Uout,Volts')
plt.grid()
#plt.xticks(rotation=-90)
plt.show()

In particular, I get this frequency response on the PCB.

In principle, you can choose 20kHz for the PWM frequency and rest.

Now we need to understand by what law the amplitude changes zero harmonics PWM depending on pulse duration tau. To answer this question, you need to resort to digital signal processing and remember what the spectrum of a PWM signal looks like.

If you calculate the spectrum graph by definition, you get this frequency response.

It can be noted that the narrower the PWM pulse, the wider its spectrum. The wider the PWM pulse, the narrower its spectrum.

Let's say we took an oscilloscope and recorded exactly one period of a PWM signal with a pulse in the center into memory. If we calculate the Fourier transform of this impulse, we obtain function (1)

Rectangular pulse spectrum

Rectangular pulse spectrum

To understand the calculations of this integral, we must remember that sin(x) in complex form is (3), and the exponent does not change form when integrated (4)

\\ sin(x)= \frac{e^{jx}-e^{-jx}}{2j} \qquad (3) \\ \int e^{x} dx =e^{x}+C \ qquad (4)

The spectrum of a periodic sequence of rectangular pulses is a set of harmonics with an envelope of the form (1)

S(\omega) = A \frac{sin( \frac{\omega \tau}{2})}{\frac{\omega T}{2} } \qquad \qquad \qquad (1)

We are interested in the value at zero frequency. Therefore, we will calculate the limit of the PWM signal spectrum when the frequency tends to zero. Here an uncertainty of the form 0/0 arises. How to be? To reveal the uncertainty, we will use L'Hopital's theorem (the limit of a fraction is equal to the limit of derivatives in the numerator and denominator). This rule applies here.

S(0)=\lim_{\omega \to 0}A\frac{sin(\frac{\omega \tau}{2}))}{\frac{\omega T}{2}} = A \lim_ {\omega \to 0}\frac{\frac{\tau }{2} cos(\frac{\omega \tau}{2}))}{\frac{T}{2}} = A \frac{ \tau}{T}=A\tau F_{pwm} \qquad \qquad (2)

We cannot vary the amplitude of “A”, since this is a digital GPIO pin, which can be either 0V or 3.3V. As can be seen, the amplitude of the zero harmonic S(0) linear depends on the pulse width of the PWM signal. So we got the answer to the question [3]. Yes, the output voltage depends linearly on the pulse duration. It's a good news! As, however, there is also a linear dependence on the PWM frequency. However, a counter-intuitive phenomenon appears here. Is it really possible to increase the voltage at the output of the low-pass filter to infinity simply by increasing the PWM frequency? But no! The fact is that by increasing the frequency, the period T (6) will decrease. And the pulse duration tau is limited from above by the duration of the period T (5).

\\ 0 \leqslant \tau \leqslant T \qquad \qquad (5) \\ F_{PWM}= \frac{1}{T} \qquad \qquad (6)

So we only have the pulse duration tau (filling) to control the voltage at the output S(0).

As you know, an MCU can output voltages from 0 to 3.3 V. What if you need to set voltages in a higher range? The answer is also simple. The trick is to make the RC filter drive the variable resistor in high voltage voltage divider 1.

The bipolar NPN transistor BC847B can act as a variable resistance resistor. Wanting to increase the range of adjustable voltages, we obtained an inverse proportionality between the PWM filling tau and the output voltage Vext.

PWM filling

V_ext

0

Vin

100

0

Not convenient? Yes… Well, this is the price to pay for the cheapness of the electrical circuit. It's always like that in electronics. Law of conservation of complexity. Make the circuit design simpler, the software will be more complex. Make the software simpler, the circuitry will be more complex.

Practical part

Now it's time to perform the crucial experiment. Check all these ephemeral calculations on a real unit.

Setting low voltages

If you simply measure the no-load voltage at the output of the RC filter, you will get these voltage values.

https://docs.google.com/spreadsheets/d/1-kPMUlmZBTUzocDJKJ00UnIG2HoR3Je3D6RODO36Ik4/edit?gid=0#gid=0

This is how the graph turned out. As you can see, the graph turned out to be linear. This means that theory and practice coincide. Success!

High voltage installation

Now let’s check how things are going with the installation of high voltages. Here we essentially adjust the resistance of the GND resistor in the voltage divider. The collector-emitter resistance of a bipolar NPN is not well understood as a function of the applied base voltage.

For clarity, I took a graph of the voltage at the output of voltage divider No. 1 versus the duty cycle and got something similar to the arctangent y=arctg(x). This created a very narrow operating range of effective duty cycles to regulate the output voltage. This graph is plotted at a PWM frequency of 20kHz

nonlinear relationship between duty cycle and final voltage

nonlinear relationship between duty cycle and final voltage

The results of the experimental data are collected in this registry: https://docs.google.com/spreadsheets/d/1-kPMUlmZBTUzocDJKJ00UnIG2HoR3Je3D6RODO36Ik4/edit?gid=0#gid=0

However, there is good news. Schedule monotone (decreases everywhere). This means that you can use numerical methods to select the required duty cycle. One such method is a PID controller.

I added a PID controller to set the duty cycle of the PWM signal based on the difference between the desired voltage and the measured voltage. In this case, only the integral circuit of the PID controller works. The P and D coefficients are simply set to zero.

Thus, over time, the PWM duty cycle itself adjusts to the desired voltage. And so on for each of the 4 channels.

Happened.

What can be improved?

1–Try to use BAM modulation rather than PWM. This will probably reduce signal flicker at low frequencies.

2–Assemble the entire analog circuit in ASIC design. This is to reduce the PCB area.

Advantages of PWM-DAC

1++It's cheap. All you need are resistors, capacitors and one transistor.

Disadvantages of PWM-DAC

1–If the PWM frequency is insufficient, voltage ripples occur at the output.

2–If you increase the PWM frequency, high inertia appears. Long transient process to set the desired voltage.

3–If you control a high-voltage voltage divider, you get a very narrow range of possible duty cycles to regulate the output voltage.

4–If the capacitor is of high capacity, then the process of setting the voltage will be very long. Again high inertia.

Results

As you can see, in order to understand and assemble such a simple thing from a hardware point of view as PWM-DAC, I had to remember DSP, integrals, complex numbers, trigonometry, limits, L'Hopital's rule, Fourier transform, TAU, voltage dividers, Kirchhoff's laws, RC filters, etc.

At the same time, PWM-DAC is a palliative solution. There are two problems here: output ripple and high inertia. When you solve the first problem, a second one arises. When you solve the second, the first appears.

Better install ASIC DAC in tandem with OAP.

Dictionary

To understand this topic, you need to be able to recognize these abbreviations.

Acronym

Decoding

PWM

Pulse width modulation

LPF

Low pass filter

TAU

Automatic control theory

BAM

Binary angle modulation

ASIC

Application-specific integrated circuit

HW

Hard Ware

OAP

Operational Amplifier

frequency response

Amplitude-frequency response

PWM

Pulse Width Modulation

DSP

Digital signal processing

PCB

printed circuit board

DAC

Digital-to-analog converter

R.C.

resistor–capacitor circuit

Questions:

Why is voltage denoted by the letter U in physics?
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