VGA video card based on Soviet chips
To be or not to be a VGA video card on Soviet microcircuits?!
It will be! I present to your attention a VGA video card:
Resolution 256 x 128 pixels, 256 colors, 2 pages
video memory and all this on 60 microcircuits. The total volume of video memory is 64 KB.
The microcircuits used were of Soviet production, although some are already
Russian, but the technology is still of those times, which means it’s possible
neglect. This video card was designed for Computer “Taimyr-2”which aims at
the book of “Guinness records” as the most protracted project.))) In fact, the video card
it doesn't matter who you work with in a bundle, so you can connect any “stone” to it.
The main thing is to have enough pins. And there should be no more and no less than 15 of them (8-bit data bus, 5 commands, clock and visible window signal).
Color is organized by one byte, in which 3 bits are allocated for red, 3 for green, and 2 for blue.
Teams:
Send X coordinates
Pass Y coordinates
Set the pixel of the desired color according to the previously transmitted coordinates and increase the X coordinate by 1. If X becomes greater than 255, then X becomes equal to 0, and the Y coordinate increases by one. If Y becomes greater than 127, then the pixel is drawn on page No. 2.
Receive the contents of the pixel at the previously transmitted coordinates and increase the X coordinate by 1. If X becomes greater than 255, then X becomes equal to 0, and the Y coordinate increases by one. If Y becomes greater than 127, then the pixel is taken from page No. 2.
The circuit diagram is very large, so for a detailed look I recommend downloading it from the link: Yandex Disk. or GitHub.
Brief job description:
Since the video mode is 640×480 pixels, 60 Hz. It is necessary to clock the circuit with a frequency of 25.175 MHz. But this video card has a resolution of 256×128, which means that 1 pixel needs to be stretched in width and height. To do this, you need to reduce the quartz by half, that is, you need 12.5875 MHz. But then a problem arose: I could not find a Soviet quartz resonator at 12.5875 MHz. or at 25.175 MHz, so I had to twist it with quartz at 12.5 MHz. This is certainly not Feng Shui, but the monitor at least accepts such deviations. Generator assembled on the K155LN1 (U56) microcircuit. Next, the clock pulse is sent to the unit for generating a horizontal sync pulse and horizontal window visibility (U57-U59, U41-U45, U51-U55). Two signals come out from the K155TM2 (U60) chip: leg 6 – display of the picture window horizontally, leg 8 – line sync pulse. When a line ends, a signal is sent from the K155LA3 chip (U45, 6th leg) to move to the next line to the unit for generating a frame sync pulse and vertical window visibility (U46-48, U49, U50, U27, U28, U30-U35). Two signals come out from the K155TM2 chip (U29): leg 6 – display of the picture window vertically and the “enable” output, leg 8 a frame sync pulse. The “enable” output is needed to inform the microcontroller that the video card can safely write/read video memory. You can, of course, ignore this signal, but then when accessing video memory, artifacts will appear on the monitor screen. Although this gives an increase in speed, because the reading/writing process occurs even when the beam draws a picture in the visible part of the screen. Simply put, the “allow” signal = LOW from line 145 to line 401 (visible area of the screen), the rest of the time the “allow” signal = HIGH.
Counters K155IE7 (U18-U21) sort through video memory addresses. At the output of the counters, KR580IR82 registers (U12, U13) have been added, which are not used for their intended purpose, but simply to create a Z – state. The decoder K155ID10 (U14), depending on the address, turns on the necessary video memory chip KR537RU17 (U1-U8). Data from the video memory goes to the KR580IR82 register (U9) at the output of which there is an R2R – DAC (digital-to-analog converter), which generates color saturation.
Register KR580IR82 (U11) opens when it is necessary to read the contents of video memory. Register KR580IR82 (U10) opens when it is necessary to write to video memory. The rest of the time these registers are in the Z-state.
Counters K155IE7 (U23-U26) are necessary to set the video memory address from which reading or writing operations will be performed. The counter K155IE7 (U23) additionally takes part when changing the visible page. From which the 0th and 1st bits are taken to set the trigger of the K155TM2 page (U22). The KR580IR82 registers (U16, U17) create a Z-state between the counters and the video memory addressing bus.
This concludes the brief description.
links to documentation:
