NXP S32G processor for modern automotive electronics architecture


In the next decade, when more and more cars will switch to electricity, have more connections and become more automated than ever, we will also see major changes in the architecture of automotive electronics. As more and more data is generated by sensors, exported to the cloud, and received from various services, automobiles need new computing power. Given all these circumstances, NXP introduced at CES 2020 its latest S32G network processor.

S32G is the latest member of the S32 family from NXP, which was created in 2017. Like all other processors of this family, it is based on ARM Cortex processor cores. Three pairs of low-power Cortex-M7 cores and four high-performance Cortex M-53 cores perform basic processing tasks. The cores are also complemented by special network accelerators, digital signal processing and encryption cores.

Network accelerators support both traditional automotive network protocols (such as CAN, LIN, and Flexray) and gigabit Ethernet. In the case of automated vehicles producing up to 4 GB of raw data per hour, data transfer in the car is very important. Accelerators handle most of this workload, leaving ARM cores freer for other tasks.


One of the tasks that S32G can solve is data preprocessing. Most of the data produced by an autonomous car is used only in real time for control and this data does not need to be transferred to the cloud or shared with other cars. However, there are also needles in the haystack of this data that can be useful for a wide range of services, such as transmitting pothole location information or weather data.

“I spoke not only about transferring and moving from raw data to information, but also about reducing the volume of this data, which will save traffic on 4G and 5G networks, which is really important.” Said Brian Carlson, director of product line management, network department processors for cars in the NXP. “The level of functional safety is increasing, as we are increasing the level of autonomy using the ASIL-D standard. Typically, the gateway works according to the ASIL-B standard, but we see an increased interest in using ASIL-D, and when using advanced driver assistance systems, you definitely need the ASIL-D standard, which is great for such applications ”

“In fact, we did not design this processor for this use, it was developed as a kind of network device, but it turned out to be useful in this area. I worked in the field of digital signal processors, which were supposed to work with speech and telecommunications, but look at the development of these processors, now they are everywhere. ”

Although the S32G was designed to manage data throughput in next-generation electronic vehicle architectures (such as the Aptiv’s Smart Vehicle Architecture (SVA), GM’s digital automotive platform, or Ford’s new electronic vehicle platform), it can also perform a host of other tasks. . Traditional electronic architectures have evolved gradually since the 1970s.

Each time a new feature is developed, such as adaptive cruise control, assistance with keeping in the lane or monitoring blind spots, each supplier uses its own computer for it. This has resulted in high-performance vehicles having 100 or more separate computers and 2 or more miles of copper wiring.

Modern platforms combine these computers, resulting in about 10-15 devices (or even less). These larger and more powerful computers will use significantly more powerful processors to process the same amount of data that was previously distributed across dozens of chips.

Platforms like SVA are built around this concept and the S32G is potentially great for such use cases. Thanks to the presence of several cores, it is able to provide a supply of labor that can provide error detection. The I / O capabilities and network characteristics of the new chip are ideal for receiving data from cameras, radars, ultrasonic sensors and lidars. ARM cores can process and combine this data to help the driver.

Network acceleration is one of the key aspects of the S32G. Without it, processing of gigabit connections would take about 90% of the computing power of the ARM cores. When the accelerator is on, the load decreases to 0.2%, and the processor cores remain free for other tasks.

It is unlikely that the S32G will have such a performance that will allow it to directly compete with chips such as the recently announced Nvidia Orin, but it could potentially become an alternative to something like the Xavier or MobileQ EyeQ5 in partially or fully autonomous driving systems (L2 and L3). It can also control electric motors and battery management systems.

Three pairs of Cortex-M7 operate in dual channel mode. Each core in a pair executes the same code, providing the ability to detect any work anomalies within this pair, while any pair can perform different tasks. Four Cortex-A53 cores can optionally operate in dual-channel mode, in which each pair will perform tasks on two cores simultaneously. The use of this mode depends on the nature of use of the S32G, and if such redundancy is not required, then the four A53s can operate independently of each other.

In total, the S32G has 20 CAN interfaces, 4 gigabit Ethernet interfaces, 2 third-generation PCI-express interfaces that provide flexibility for a wide range of use cases. NXP does not advertise specific maximum job opportunities like some competitors due to its wide range of applications and configurations. However, it consumes less than half the power of previous NXP chip solutions, which automobile engineers will undoubtedly appreciate.



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