How does 1TB fit on a microSD? – Analysis

How does one terabyte of data fit on a small microSD card the size of a fingernail? We were asked such a question in the comments to video about data encryption… Sounds interesting! Today we will find out what is inside the SD card and SSD drive. What do modern memory chips have in common with a puff pie? And what capacity will our disks and memory cards be in a few years?

Oldies, who remembers 2004? Then, for the first time, an SD card with a record capacity of 1 gigabyte appeared on sale. It was an event and the card was valued at a solid sum of $ 500.

And 15 years later, they introduced microSD memory cards with a volume of 1 terabyte.

But how in 15 years did we learn to place a thousand times more information in half the space?

To answer this question, we need to understand:

How are SD cards arranged?

Let’s start with the physical architecture. If you look under the plastic layer of an SD or microSD card, we will see one small chip – a memory controller. And one or two large chips are NAND flash memory: the most common type of memory in use today. The same chips can be found in flash drives, SSD-drives and inside our gadgets. In short, everywhere!


But why is NAND flash so popular? To answer this question, let’s dig a little bit about how flash memory works. We have already said that the basic unit of modern flash memory is a CTF (Charge Trap Flash memory cell), that is, a Cell with a Charge Trap.

This is not a figurative expression. The cell is really capable of locking a charge inside itself and storing it for years! Accordingly, if there is a charge in the cell, this is 1, if there is no charge, it is 0.

All cells are organized in a NAND structure. NAND is such a logical NOT-AND gate, that is, NOT-AND. Here is a table of its values.

In fact, this is an inverted gate I. According to the truth table at the output of the gate AND, we get one only if a one comes to both inputs. In NAND, the opposite is true.

By the way, NAND has an interesting property – any logic function can be implemented using a combination of NAND gates. This property of NAND is called functional completeness.

For example, CMOS matrices or CMOS matrices, which are used in most modern digital cameras, including in all mobile phones, can be fully implemented only on NAND gates.

  • CMOS – complementary metal-oxide-semiconductor structure
  • CMOS – complementary metal-oxide-semiconductor

The completeness property of NAND is also shared with NOR gates, that is, NOT-OR. By the way, NOR flash memory also exists. But why is NAND memory installed everywhere, and not NOR?

NAND memory is an interesting thing. It can be compared to wholesale purchases at a supermarket. You can read and apply voltage to NAND only for a whole package of cells. Therefore, we cannot read or write data to any particular cell.

In NOR memory, the opposite is true, we have access to each cell.

It seems like the superiority of NOR is obvious, but why then do we use NAND?

The fact is that we cannot connect each cell in NOR memory separately. All this makes the size of the cells large and the structure massive.

In NAND, the opposite is true: cells are connected in series one after the other, and this allows cells to be made small and placed tightly together. Therefore, a NAND chip can hold 16 times more data than a NOR chip.

It also allows you to quickly read and write large data arrays, since we always simultaneously operate with a group of cells.

Single column structure NAND flash with 8 cells

Arrangement of six NOR flash cells

Moreover, NOR memory is not optimal for reading and writing large amounts of information, but it wins when you need to read a lot of small data at random. Therefore, NOR memory is used only for specific tasks, for example, for storing and executing microprograms. For example, the BIOS may well be written to NOR memory, or even the firmware in the phone. At least they used to do it like that.

And NAND is perfect for SSDs, memory cards, and more.


Okay, NAND is dense, we figured it out. But how to make it even denser?

For a long time, NAND cells were stacked horizontally in columns and a single-layer flat structure was obtained. And manufacturing memory was like manufacturing processors — using lithography techniques. This memory was called 2D NAND or planar NAND.

2D PLANAR NAND structure

Accordingly, the only way to compact the information was to use more subtle technical processes, which is what the manufacturers did.

But by 2016, manufacturers had reached a 14-15 nanometer process technology. Yes, the coolness of memory can also be measured in nanometers. Nevertheless, it turned out to be a ceiling for 2D NAND memory.

It turns out that progress has stopped in 2016? Not at all.

The solution was found by Samsung. Realizing that planar, that is, flat, NAND is on its last legs, back in 2013 Samsung overtook its competitors and introduced the industry’s first 3D NAND device.

They took a column with horizontal NAND cells and placed it vertically, which is why 3D NAND is also called V-NAND or vertical NAND. Just look at this beauty!

These red things on top are bit lines, that is, data channels. And green jokes are layers of memory cells. And if earlier the data was read from one layer and entered the bitline, now the data from all layers began to enter the channel simultaneously!

Therefore, the new architecture allowed not only to significantly increase the information density, but also to double the reading and writing, and also to reduce power consumption by 50%!

The first 3D NAND chip consisted of 24 vertical layers. Now the norm is 128 layers. But already in 2021, manufacturers will switch to 256 layers, and by 2023, to 512, which will allow up to 12 terabytes of data to be placed on one flash chip.

Ahem, ahem. Wait a minute! An attentive reader might have noticed that the above plate says 12 terabits, where did I get the terabits from then? The fact is that 12 terabits fit on one flash memory chip, and in one chip you can place up to 8 crystals one above the other. So it turns out 12 terabytes.

But it is impossible to build up more and more storeys of memory indefinitely. Even now, there are a lot of problems with production. Unlike 2D memory, which was produced by lithography, 3D NAND relies heavily on sputtering and etching techniques. Production has become like making the world’s tallest cake. It was necessary to literally build up perfectly even layers of memory on top of each other so that nothing floated and settled. Horror!

Moreover, in this layered cake, you need to somehow make 2.5 million perfectly even channels going from top to bottom. And if when there were 32 layers, manufacturers could easily deal with it. Then we have problems with increasing the number of layers. Everything is like in life!

Therefore, manufacturers began to use different hacks: for example, make 32 layers and lay them on top of each other through an insulator. But such methods are more expensive to manufacture and are fraught with defects. By the way, for the curious, at the moment these channels are made not by a drill, but by the method of reactive ion etching (RIE). Simply put, by bombarding the surface with ions.


So what are we hitting the ceiling again? Now literally. No! Indeed, in fact, you can not only increase the number of cells. You can increase the amount of data inside the cell!

Those who are interested in the topic, or have chosen an SSD drive for themselves, probably know that there are four types of memory cells SLC, MLC, TLC, QLC.

SLC-cell (Single Layer Cell) can store only 1 bit of information, that is, only zero or one. Accordingly, the MLC cell already stores 2 bits, TLC – 3, QLC -4.

It seems to be cool! But the more bits we can put into a cell, the slower the reading will be, and most importantly, the writing of information. And at the same time, the memory will be less reliable.

Now we will not dwell on this in detail, but in a nutshell, in consumer products now the gold standard is TLC memory, that is, three bits. This is the best option in terms of speed, reliability and cost.

SLC and MLC are cool professional solutions.

QLC, on the other hand, is a budget option that suits scenarios where you don’t need to overwrite data frequently.

By the way, Intel is already preparing a successor to QLC – a five-bit PLC memory (Penta Level Cell).

The answer to the question

This, of course, is all very interesting, but maybe let’s return to the original question: How can 1 terabyte fit in a simple microSD card now?

Well, now that we know everything, we answer the question.

The Micron card (and most likely SanDisk card) uses the same memory chip inside. It is a 96-layer 3D NAND QLC memory. One die of this kind of memory holds 128 gigabytes of data. But where, then, is 1 terabyte?

As we said before, 8 crystals are placed in one flash chip. So much for 1 terabyte. It’s that simple!

What does the future hold for us?

Well, flash memory technology is evolving very quickly. In 2-3 years we are promised chips for 12 terabytes. And in another 10 years, maybe 20, and we will jump for a hundred terabytes. Moreover, SD cards of the new SD Ultra Capacity format support capacities up to 128 terabytes.

One thing is not clear – will we need SD cards in so many years.

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