Calculation of losses in MOSFET transistors
Greetings!
In this article, I will tell you how I calculate losses on MOSFET transistors when designing a power supply and will superficially consider the main transient processes associated with losses on MOSFET transistors (hereinafter referred to as transistors).
Before you begin the calculations, you need to understand what these losses consist of and what they depend on. In the document [1] from infeneon believe that the total loss of the transistor (Pgenerally) consist of conductive (Pcond) and dynamic (Pding) losses.
Now, more about the types of losses themselves:
1) Conductive losses depend on the current flowing through the junction (ID.S.) drain-source transistor and resistance of the open drain-source junction (RDS(on)). There is also another part of conductive losses, which appears only when the transistor is turned on in certain ways – these are losses when current flows through the parasitic diode of the transistor, for example, when using the transistor as the lower switch of a synchronous Buck converter, but this will not be taken into account here, since this is a feature scheme and you just need to keep it in mind.
2) Dynamic losses. Roughly speaking, these are the costs of turning the transistor on and off. Most novice developers don't even know about their existence, but they can account for the majority of losses under certain conditions. Dynamic losses depend on many variables, such as the characteristics of the transistor itself (junction capacitance, internal gate resistance, threshold opening voltage, etc.), on external transistor control parameters: transistor operating frequency, on and off currents, on time, gate voltage , gate voltage rise time, etc. Figure 1 shows dynamic losses (Pon and Poff) in one operating cycle of the transistor.
Total losses are presented as the sum of losses at different stages of operation of the transistor, which are presented in Figure 1.
Let us consider the processes in dynamic losses in more detail. In the manual from Sipex Corporation in the document “Application note ANP20” [2] The processes in dynamic operating modes – when the transistor is turned on and off – are described in sufficient detail.
Next, several main stages of transistor operation will be considered – switching on, active operating mode, saturation mode and switching off. For ease of perception, the internal capacitances of the transistor are shown in Figure 3
1. Turn on:
1) t0 – initial state of the transistor turned off;
2) t0 – t1 charge of gate capacitances Cgs;
3) t1 – the gate-source voltage reaches the threshold opening voltage, the opening of the channel begins, ID.S. equals 0;
4) t1 – t2 – gate capacitance Cgd continues to charge, ID.S. increases due to the opening of the channel.
2. Active operating mode:
1) t2 – gate capacitance Cgd fully charged, current through drain-source junction ID.S. reaches the nominal value in static mode;
2) t2 – t3 – the transistor enters the active operating mode, the internal capacitance of the drain-source transistor C is chargeddswhich causes a voltage drop across the drain-source junction and leads to the “Miller effect”, which is where part of the gate current flows through the drain-source junction, resulting in a constant gate-source voltage until it discharges drain-source transistor capacitance Cds;
3) t3 – drain-source capacitance Cds The transistor is completely discharged, so the drain-source voltage is minimal and corresponds to the voltage drop across the parasitic resistance of the transistor Rds(on) in the open state, the transistor goes into saturation mode.
3. Saturation mode:
1)tR – the gate-source voltage begins to increase again due to additional charging of the gate capacitance Cgsbut the gate-source charge current is already minimal.
4. Switching off.t0'-t6 The switching off mode is similar to the switching on mode described in paragraph 1, only it occurs in the reverse order.
Now that we have sorted out the main types of losses and have an understanding of what they consist of, we can begin to make calculations.
To start calculations, you need to write down the data on the transistor and its operating mode. Table 1 lists the necessary parameters for the calculation.
Table 1 Main variables for calculations
Variable | Description | Unit. | Note |
Data from the description of the transistor (datasheet, specifications) | |||
RDS(ON) | Drain-source transition resistance in open state | Ohm | |
UGS(TH) | Gate-source threshold voltage | IN | For the most severe mode, select the minimum value |
CISS | Transistor input capacitance | F | In domestic descriptions it is designated as Celeven |
CRSS | Reverse transistor capacitance | F | In domestic descriptions it is designated as C12 |
RG | Internal gate resistance | Ohm | It is not always given in the description; you can ignore it or take a conditional value from 0 to 3 Ohms |
UG.P. | Voltage at which the Miller effect occurs | IN | It is not indicated in the basic characteristics of the transistor. Typically, descriptions provide a graph in the form of the gate-source voltage UG.S. from gate charge QG |
Transistor operating mode data | |||
ID.S. | Maximum current flowing through the drain-source junction in saturation mode | A | |
D | Fill factor | Inversely proportional to the duty cycle of the pulses S (D=1\S). Is in the range from 0 to 1 | |
UD.S. | Drain-source voltage | IN | Maximum applied drain-source voltage in the off state of the transistor |
fs | Transistor operating frequency | Hz | |
UGSF | Gate-source voltage | IN | The maximum voltage that is supplied to the transistor |
ROR | Resistance to turn on the transistor | Ohm | |
ROF | Resistance to turn off the transistor | Ohm |
The first step is to calculate the turn-on time of the transistor using formula (3) [2]:
Next, we calculate the turn-off time of the transistor using formula 4 [2]:
When the values for the turn-on and turn-off times of the transistor are obtained, you can proceed to the basic formula for calculating the total losses on the transistor (5) [2]which is a consequence of the previously given formula (1):
That's all, it would seem, a simple calculation. Now I will give an example of calculating losses on a transistor.
1. Scheme of work.
Its parameters, such as duty cycle, voltage, current through it, and type of control, depend on the operating circuit of the transistor.
For a simple example, I’ll take the buck converter circuit shown in Figure 4
Initial data for the scheme:
– gate-source input voltage (UD.S.) 12 V, which is set by generator V1;
– duty cycle (D) – 0.2 (this is how generator V2 is configured. Pulses with a duration of 1 μs and a frequency of 5 μs D = t\T, where t is the pulse duration, and T is their repetition period, respectively D = 0.000001/0.000005 , D = 0.2)
– gate-source voltage (UGSF) that generator V2 creates is 12 V;
– external gate resistance to turn on (ROR), shown in the diagram as R1 and is 10 Ohms;
– external gate turn-off resistance (ROF), shown in the diagram as R2 and is 1 Ohm;
– transistor operating frequency (fs) is equal to 200 kHz (fs =1\T, fs =1\0.000005);
– current through the drain-source of the transistor (ID.S.) in this scheme is equal to Iout and equals 1 A;
This completes the parameters from the circuit, then I take the parameters of the transistor itself (I took the IRF540PBF as an example) from the description or datasheet:
– drain-source resistance of the transistor in the open state (RDS(ON)) is best taken from the graph, which shows the dependence of the applied gate-source voltage and the open-channel resistance, but this graph is not available everywhere and you can simply take the maximum value from the “SPECIFICATIONS” table in the transistor datasheet:
In this case RDS(ON) = 0.077 Ohm;
– gate-source threshold voltage UGS(TH) taken from the same table:
For calculations, it is better to use the worst-case opening voltage, which is 2 V;
– input and return capacitances (CISS and CRSS) are usually located a little lower in the same table:
But it’s still better to take the values for the specific operating conditions of the transistor from the dependence of the internal resistances on the drain-source voltage:
With an input voltage of 12 V in the circuit shown in Fig. 4 CISS ≈ 1700 pF and CRSS ≈ 270 pF
– internal resistance of the transistor (RG) is also not indicated everywhere; to simplify, its value can be taken equal to “1”, but in our case it is in the previous table:
Accordingly, in the worst case RG will be equal to 3.6 ohms.
– the last parameter required for calculations remains – the voltage at which the Miller plateau occurs (UG.P.). It is rarely found in tables, so you have to look for it in graphs of the total gate charge (Qg) and gate-source voltage:
In our case UG.P. ≈ 5.5 V.
When all the data for the calculation have been received, first of all we calculate the opening time of the transistor using formula (3), tR =16 ns.
Then the transistor turn-off time according to formula (4), tF =23 ns.
Next, we can obtain the total power dissipation using formula (5), Pgenerally=0.06 W.
So we got a fairly accurate calculation of the transistor parameters. By changing the transistor parameters, you can understand how important it is to choose “good” transistors in order to get maximum efficiency from the circuit at frequencies above 100 kHz.
Thank you for your attention, I hope this calculation method will be useful for novice developers.
References:
1. MOSFET Power Losses Calculation Using the DataSheet Parameters. Edition 2006-07-31 Published by Infineon Technologies AG.
2. Application Note: Properly Sizing MOSFETs, Sipex Corporation 2006.